27918 design English-speaking jobs in Europe
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AI Architect
- Poland
- Spyrosoft
- Poland
- November 2
enterprise solution architecture, distributed systems, integration patterns, and scalable software design ... You will be responsible for the complete AI solution lifecycle, from discovery and architecture design ... of end-to-end AI solution architectures aligned with business and technical requirements., Design Generative ... Description: At Spyrosoft, we are growing our AI practice and looking for an experienced AI Architect to design ... architectural decisions, balancing performance, scalability, security, reliability, accuracy, and cost., Design
AI Architect
- Poland
- Spyrosoft
- Wrocław
- November 2
enterprise solution architecture, distributed systems, integration patterns, and scalable software design ... You will be responsible for the complete AI solution lifecycle, from discovery and architecture design ... of end-to-end AI solution architectures aligned with business and technical requirements., Design Generative ... Description: At Spyrosoft, we are growing our AI practice and looking for an experienced AI Architect to design ... architectural decisions, balancing performance, scalability, security, reliability, accuracy, and cost., Design
AI Research Scientist
- Spain
- Autodesk
- Barcelona
- October 14
Research, you will be doing fundamental and applied research that will help our customers imagine, design ... , researchers, engineers, and designers working together on projects that range from learning-based design ... graphics, robotics, human-computer interaction, sustainability, simulation, manufacturing, architectural design
Structural Engineer
- Belgium
- Michael Page
- Hainaut
- October 6
Design and verify steel structures, reinforced concrete structures, industrial buildings, platforms, ... Strong expertise in steel structures, reinforced concrete design, industrial foundations, and finite ... Prepare and review engineering deliverables including calculation notes, design reports, technical specifications
SoC/FPGA Engineer
- Italy
- Nokia
- Milan
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Rome
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Turin
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Bologna
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Florence
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Verona
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Padua
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Genoa
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Brescia
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Naples
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Bergamo
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Venice
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Modena
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Vicenza
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Parma
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design
SoC/FPGA Engineer
- Italy
- Nokia
- Treviso
- October 16
and verification workflows RTL design (VHDL/Verilog/SystemVerilog) UVM (plus) ... Overview In this role you drive the architecture, design and validation of ASICs for optical modules ... Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization ... standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design ... NERGs and coaching/mentors Learning and career growth opportunities Responsabilità Architect, specify, design